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TC74
DS21462C-page 4
?2002 Microchip Technology Inc.
FIGURE 1-1:
Timing Diagrams.
C = LSB of Address Clocked into Slave
t
SU(START)
t
H(START)
t
SU-DATA
t
SU(STOP)
t
IDLE
A = Start Condition
B = MSB of Address Clocked into Slave
C = LSB of Address Clocked into Slave
D = R/W Bit Clocked into Slave
A
B
C
D
E  F
G
H
I
J
K
E = Slave Pulls SDA Line Low
F = Acknowledge Bit Clocked into Master
G = MSB of Data Clocked into Master
H = LSB of Data Clocked into Master
t
LOW
t
HIGH
I = Acknowledge Clock Pulse
J = Stop Condition
K = New Start Condition
SCLK
SDA
SMBUS Read Timing Diagram
t
SU(START)
t
H(START)
t
SU-DATA
t
SU(STOP)
t
IDLE
A = Start Condition
B = MSB of Address Clocked into Slave
D = R/W
 Bit Clocked into Slave
E = Slave Pulls SDA Line Low
A
B
C
D
E  F
G
H
I  J
K
L
M
F = Acknowledge Bit Clocked into Master
G = MSB of Data Clocked into Slave
H = LSB of Data Clocked into Slave
I = Slave Pulls SDA Line Low
J = Acknowledge Clocked into Master
K = Acknowledge Clock Pulse
L = Stop Condition, Data Executed by Slave
M = New Start Condition
t
LOW
t
HIGH
SCLK
SDA
t
H-DATA
SMBUS Write Timing Diagram
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